ベン アブダラ アブデラゼク

BEN ABDALLAH Abderazek

Professor, Regent (Dean of the Undergraduate school)

Affiliation
Department of Computer Science and Engineering/Division of Computer Engineering
Title
Professor, Regent (Dean of the Undergraduate school)
E-Mail
benab@u-aizu.ac.jp
Web site
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Education

Courses - Undergraduate
- Computer Architecture, Undergraduate level, The University of Aizu (UoA), 2018 – present
- Introduction to Computer Systems, Undergraduate level,The University of Aizu (UoA), 2018 – present
- Parallel Computer Systems, Undergraduate level, The University of Aizu (UoA), 2018 – present
- SCCP-001 – Student Cooperative Class Project (System-on-Chip Design), The University of Aizu (UoA), 2009-2010
- Computer System Engineering, The University of Aizu (UoA, 2008-2018
- Embedded Systems, The University of Aizu (UoA), 2008-2016
- Logic Circuit Design Exercises, The University of Aizu (UoA), 2008-2018
- Computer Architecture Exercises,The University of Aizu (UoA), 2008-2018
Courses - Graduate
- Neuromorphic Computing, The University of Aizu (UoA), 2023 – present
- Embedded Real-Time Systems, The University of Aizu (UoA), 2008 – 2022
- Multicore Computing, The University of Aizu (UoA), 2010-2015
- Advanced Computer Organization, UoA, 2008 – 2023
- Network-on-Chip, Hong Kong University of Science and Technology (KUST), Hong Kong, China, 2010, 2011, 2012, 2013 (Invited intensive lectures)

Research

Specialization
Computer system
High performance computing
Intelligent informatics
Educational Background, Biography
Professional Background:

-2002.4-2007.3 Research Associate, National University of Electro-communications, Tokyo
-2007.4-2007.9 Assistant Professor, National University of Electro-communications, Tokyo
-2007.10-2011.3 Assistant Professor, The University of Aizu
-2011.4-2012.3 Associate Professor, The University of Aizu
-2012.4-2014.3 Senior Associate Professor, The University of Aizu
-2014.4-present Professor, The University of Aizu
-2014.4-2022.03 Head, Computer Engineering Division, The University of Aizu
-2014.4-present Member, Education and Research Council, The University of Aizu
-2022.4-present Dean, School of Computer Scinece and Engineering,The University of Aizu
-2022.4-present Regent, The University of Aizu

Invited Lecturer:

-2010-2013 Visiting Professor, Department of Computer Science and Engineering, Hong Kong University of Science and Technology
-2011-2015 Visiting Professor, School of Software Engineering, Huazhong University of Science and Technology
-2022 - present Lecturer, Graduate School of Science and Technology, Kyoto Institute of Technology


Academic Background:

-1988.6 Graduated from the Lycée technique 9 Avril de Sfax, High School
-19988.9-1994.6 B.S. in Electrical Engineering, Sfax University & Huazhong University of Science and Technology
-1994.9-1997.6 M.S. in Computer Engineering, Huazhong University of Science and Technology
-1999.4-2002.3 Ph.D. in Computer Engineering, National University of Electro-communications at Tokyo
Current Research Theme
Research and Development of Algorithms and Systems for AI-Enabled Automotive Edge Computing
Key Topic
Computer Architecture,3D Network-on-Chip; Fault-tolerance; Neuromorphic Computing; Automotive Edge Computing
Affiliated Academic Society
IEEE Senior Member; ACM Senior Member; Member of IEEE Circuits and Systems; Member of IEEE computer society Technical committee on computer architecture; Member of the European Alliance for Innovation; member of IEICE (2007-2019)

Others

Hobbies
Reading and visiting historical places
School days' Dream
To become a school teacher!
Motto
Simple is the best!
Favorite Books
" You Can Heal Your Life "?
Messages for Students
Concentration and organization are the keys to your research success.

Main research

Advanced On-chip Interconnects (2D/3D, Si-Photonics, Hybrid)

Complex SoCs contain dozens of components made of processor cores, DSPs, memory, accelerators, and I/O, all integrated into a single die area of just a few square millimeters. Such complex systems will be interconnected via a complex on-chip interconnect closer to a sophisticated network than current bus-based solutions. This network must provide high throughput and low latency while keeping area and power consumption low. Our research effort is about solving several design challenges to enable such new paradigm in massively parallel many-core systems. In particular, we are investigating fault-tolerance, 3D-TSV integration, photonic communication, low-power mapping techniques, and low-latency adaptive routing.

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AI-Enabled Automotive Edge Computing

Driven by the advances in AI, computer architecture, and sensor technologies, automobiles, including electric vehicles (EVs) and self-driving cars, are transforming into sophisticated high-performance computing platforms. As the advancement of these computing systems accelerates, they will be running a wide variety of applications, including sensing, navigation, etc., using specialized deep neural network systems and complex communication protocols (i.e., Ethernet, SDVs) with safety and reliability support. We study advanced automotive computing systems, including AI-powered EV Energy Harvesting and Management, EV Campus Energy Trading, and AI-enabled automotive ICs.

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Brain-inspired Algorithms and Systems

Brain-inspired (Neuromorphic) computing uses spiking neuron network models to solve machine learning problems in a more power/energy-efficient way when compared to the conventional artificial neural networks.We research adaptive low-power spiking neuromorphic systems and SoCs empowered with our earlier developed fault-tolerant three-dimensional on-chip interconnect technology. In particular, we investigate innovative algorithms and neuromorphic systems, including adaptive configuration methods to enable the reconfiguration of different network parameters (spike weights, routing, hidden layers, topology, etc.), fault-tolerance, thermal-aware mapping methods, and on-line learning algorithms. The target applications include anthropomorphic robotics and edge computing.


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